1. Field of the Invention
The present invention relates to a power amplifier, and more particularly, to a power amplifier with low circuit complexity, high stability against temperature and bias variations, and high signal linearity.
2. Description of the Prior Art
As technology evolves, wireless communication is an important part of human life. Various electronic devices, such as smart phones, smart wearable devices, tablets, etc., utilize wireless radio frequency (RF) system to transmit and receive wireless signals. A power amplifier (PA) is a necessary amplifier in a transmitter composing a wireless RF system. Small- and large-signal performances of the PA usually determine the performance of the overall wireless RF system. Moreover, signal linearity and stability against temperature and bias variations are key performance metrics of the PA.
In the prior art, PA circuits within using the techniques of harmonic signal detection and compensation, high-order harmonic adjustment, tunable output matching network, parallel type transconductance compensation, and envelope tracking are provided to improve the linearity thereof. The harmonic signal detection and compensation offers an adjustable function of automatic bias control by detecting and filtering an output signal through a feedback network when the output amplitude becomes a large signal. However, the circuit complexity thereof grows for practical implementation. In addition, using high-order harmonic adjustment and tunable output matching network controls a reflection condition of high-order harmonic waves and adjusts the waveform of an output signal by slightly tuning the harmonic impedances of an output impedance network in the PA circuit, such that the signal linearity of the PA circuit can be improved. Since a complicated output impedance network results in a worse performance such as an output power loss or the sensitivity to frequency response, more concerns are need to be considered in PA circuit design.
The parallel type transconductance compensation may adjust bias and generate a mixed output signal through two transistors combined in parallel, so as to achieve a compensationon third-order intermodulation (IMD3), which improves an overall linearity to the LNA circuits. Generally, high capacitance at both input and output ports presents in PA circuits for high output power consideration, which influences high frequency performance, i.e., high frequency impedance matching and high frequency signal gain. In addition, the envelope tracking architecture provides a dynamic bias control under different operating powers via feedback sensing network and digital controller, which improves the DC and RF power efficiencies. However, using envelope tracking requires more active and inactive components such as analog and digital control circuits, which could increase the circuit complexity and production cost of the PA circuit.
Therefore, how to provide a power amplifier with low circuit complexity, high stability in temperature and bias variations, and superior signal linearity is a significant objective in the field.